1. Field of the Invention
The present invention relates to a charge-coupled device used in a solid-state imaging sensor, a memory device, and a delay device. More particularly, the invention relates to a charge-coupled device having an ONO (oxide-nitride-oxide) transfer gate insulating film, specifically to a charge-coupled device and a solid-states imaging sensor designed to reduce the surface states in the peripheral circuit transistors; and to a method of manufacturing such devices.
2. Description of the Prior Art
In general, a charge-coupled device (CCD) comprises a semiconductor substrate, a buried transfer channel formed in the semiconductor substrate, a transfer gate insulating film formed on the semiconductor substrate, and transfer gate electrodes of two-level or three-level structure formed on the transfer gate insulating film. To enhance the transfer efficiency of charges along the buried transfer channel, a multilayer insulating film consisting of a silicon oxide layer, a silicon nitride layer, and a silicon oxide layer (the so-called ONO film) is often used for the transfer gate insulating film. In the charge-coupled devices in which the ONO film is used as the transfer gate insulating film, when forming second transfer gate electrodes, the formation of thick silicon oxide layers (the so-called gate bird's beak) under the edges of the first level transfer gate electrodes is prevented. Also, the dielectric strength of the ONO film is larger than that of a single silicon oxide layer.
Japanese Laid-Open Patent Publication No. 2-220450 discloses an example of a charge-coupled device using an ONO film as an gate insulating film. The charge-coupled device and the method of fabricating the same disclosed therein will be described below with reference to the accompanying drawings. FIG. 11 shows the prior art charge-coupled device. The charge coupled device comprises: a semiconductor substrate 3 which has a charge transfer block 1 and a peripheral circuit block 2; and an isolation oxide 4 for isolating the charge transfer block 1 from the peripheral circuit block 2. A multilayer insulting film 8 is formed on the charge transfer block 1. The multilayer insulating film 8 includes a silicon oxide layer 5 formed on the semiconductor substrate 3, a silicon nitride layer 6 formed on the silicon oxide layer 5, and a silicon oxide layer 7 formed on the silicon nitride layer 6. First transfer gate electrodes 9 are formed on the multilayer insulating film 8. A silicon oxide layer 10 is formed on the surface of the first transfer gate electrodes 9. Second transfer gate electrodes 11 are formed between the first transfer gate electrodes 9. A MIS (metal insulator semiconductor) transistor is formed on the peripheral circuit block 2. The MIS transistor comprises a gate insulating film 12 formed on the peripheral circuit block 2, a gate electrode 14 formed on the gate insulting film 12, source and drain regions 13 formed in the peripheral circuit block 2 of the semiconductor substrate 3.
As shown, on the charge transfer block 1, the multilayer insulating film 8 of the transfer gate is formed under the transfer gate electrodes 9 and 11, while on the other hand, the gate insulating film 12 of the peripheral circuit block 2 is formed from a single-layer insulating film. This construction is said to provide the effect that since the gate electrode in the peripheral circuit block 2 is provided with the single layer insulating film, it is easy to obtain the desired threshold voltage of a MIS transistor of the peripheral circuit block 2. Another one is that since the transfer gate electrodes 9 and 11 in the charge transfer block 1 are formed above the multilayer insulating film 8 having a high reliability, there is no possibility of causing pinholes in the multilayer insulating film 8.
FIGS. 12A through 12E show the process sequence for the fabrication of the charge-coupled device. The description below uses the same reference numerals as used in FIG. 11 to indicate the same parts or portions. First, the insulating film is formed to form the isolation oxide 4 on the semiconductor substrate 3, as shown in FIG. 12A. Next, the silicon oxide layer 5 is formed over the semiconductor substrate 3 by thermal oxidation. The silicon nitride layer 6 is formed on top of the silicon oxide layer 5 by CVD. Further, the silicon oxide layer 7 is formed on top of the silicon nitride layer 6, as shown in FIG. 12B.
Thereafter, the first transfer gate electrodes 9 are formed by CVD and selective etching. Further, the silicon oxide layers 10 are formed on the first transfer gate electrodes 9, as shown in FIG. 12C. Next, a resist 15 is applied over the entire surface of the charge transfer block 1. Using the resist 15 as a mask for etching, the multilayer insulating film 8 are removed from the peripheral circuit block 2, as shown in FIG. 12D.
Next, the surface of the semiconductor substrate 3 is thermally oxidized to form the gate insulating film 12 on the peripheral circuit block 2. Thereafter, using a second polysilicon, the transfer gate electrode 11 and the gate electrode 14 are formed. Finally, the source and drain 13 are formed in the peripheral circuit block 2, as shown in FIG. 12E.
The above prior art construction cannot be used for applications in which the MIS transistors are required to have different gate insulating film thicknesses for different purposes, for example, when transistors with a reduced resistance in "On" state at the time of switching and with thus reduced noise are formed together with transistors that are used only as resistors such as load transistors.
With the prior art fabrication method, the gate insulating film 12 of the peripheral circuit block 2 is fixed to a prescribed thickness and cannot be varied in thickness according to the purpose of the peripheral circuit.
The prior art method requires that the ONO film 8 in the peripheral circuit block 2 be removed before the formation of the gate insulating film 12 in the peripheral circuit block 2. As a result, the process becomes complicated. When the gate insulating film 12 is formed by an oxidation step, exposed portions of the ONO film between the first transfer gate electrodes 9 is also oxidized to form bird's beak encroaching the first transfer gate electrodes 9, thereby degrading the characteristics of the charge-coupled device. Furthermore, there occurs a difference in the thickness of the insulating film 7 between the portions below the first transfer gate electrodes 9 and the portions below the second transfer gate electrodes 11. This results in nonuniformity of the channel formed under the transfer gate electrodes 9 and 11, causing degradation in the reliability of characteristics as the charge-coupled device.
Also, the regions of the peripheral circuit block 2 from which the silicon nitride layer 4 has been removed are affected by the stress when the isolation oxide 4 is formed, which can lead to fatal damage to the characteristics of the peripheral circuit.